Timestamp-ing for Performance

using modern x86-64 TSC for micro-benchmarking tiny kernels and hot-path timestamps in cpp

In the last series, a number of posts discussed low-latency logging frameworks and implementation.

This is a standalone post on the RDTSC (Read Time-Stamp Counter) instruction in the x86/x86-64 ISA for high resolution timing.

The Time Stamp Counter (TSC) is a powerful tool for developers seeking low-overhead timing in performance-critical applications. This blog post explores the TSC, its functionality, challenges and modern implementations. Code is included for a TSCClock implementation.